11501 工程學群 半導體學院

設計自動化二|2027

李炯霆 教授

半導體學院

 

國立清華大學半導體研究學院 特聘教授
美國加州大學柏克萊分校電子工程博士
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 【 人生理念 】長年致力於EDA電子設計自動化領域並有優異表現,
 始終為複雜的晶片設計挑戰提供具影響力的解決方案。
 【 教學網站 】https://reurl.cc/DbMn36
 https://reurl.cc/Zldab3
 【 研究專長 】專長於 3DIC 佈局設計、RC 寄生參數分析與除錯,以及精準的客製化佈局。
 ☉ 3DIC layout, RC parasitic analysis/debugging, custom layout
 【 教學領域 】設計自動化一二  Design automation (Ⅰ) (Ⅱ)
 機器學習與設計自動化 Machine Learning in EDA
 領導統御 Leadership
 企業領導 Executive Leadership
  

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Syllabus

課程大綱

 
 清華大學半導體研究學院特聘教授李炯霆,憑藉曾任新思科技(Synopsys)副總裁及思源科技(SpringSoft)研發副總的資深資歷,深植其在 EDA 領域的領袖地位。李教授專精於「設計自動化」實務教學,核心授課範疇橫跨 EDA 演算法及 3DIC 精佈局技術;李教授將分享多年 EDA 工具開發經驗,期盼藉由教學串連產學,縮減理論與實務的距離。
 Jeong-Tyng Li, NTHU Distinguished Professor and former Vice President of Synopsys, is a leading authority in the EDA industry. His expertise spans EDA algorithms and 3DIC layout, with a curriculum focused on practical design automation. By integrating foresight in AI chip design and logic synthesis into his teaching, By integrating his experience in leading several EDA tool development into his teaching, Professor Li acts as a strategic link between industry and academia, effectively narrowing the gap between theoretical research and industrial practice.
  
  在進入這堂課程選讀之前 
   「在這次的 DA(2) 大魔王作業裡,我們直接動手做,挑戰寫出自己的 EDA 開發工具!內容超級精實,直接大滿貫包辦:DRC 規矩檢查、LVS 抓錯糾察隊、Custom 手工通宵佈局、RC 寄生蟲萃取,還有現在最夯的 3DIC 摩天大樓疊疊樂!不只這樣,我們這次還走超級大運,竟然請到業界的隱藏版大牛(Experts)親自降臨!要手把手教大家怎麼從零開發 SPICE 模擬大腦、秀訊號必備的波形觀測器,還有連台積電都極度依賴的微影光罩魔法——OPC 光學逆向變形修正!」

 

 

關於DA (2) 課程大解密
About This DA (2) Course

We will discuss the major aspects in developing CAD tools for custom design,design rule checking (DRC),
 layout versus schematic (LVS), RC extraction, 3DIC layout
 • Based on the engineering efforts I led throughout my career. And more on finFet
Also we are fortunate to have experts coming to discuss how to develop Spice simulator, 
 waveform viewing and OPC
Working together to help you learning the practical aspects of EDA tools
 • How does design rule checking work?
• What is layout versus schematic? Why layout density matters?
• Important things to watch in analog layout; how about using FinFet
• How is the look up table created in cap extraction?
• When watching videos, we can think about how those functionalities were implemented?
• ...
We design some projects for you to understand more
This course is to broaden your EDA knowledge beyond digital design
  


課程資訊

Course Info

Time and place: Monday (from 2:20pm to 5:20pm) @____
I will cover custom design, DRC/LVS, RC, 3DIC layout,
Jack Yao (founder of Sandwork , ex Scientist@Synopsys ) will teach 3
 sessions of Spice simulation and waveform viewing (likely 1 session remote)
HsuTing Huang will teach a session of how OPC and litho hot
 spot detection are developed
  

參考用書
Reference Books

Design of Analog CMOS Integrated Circuits, Second Edition
 Design of Analog CMOS IC by B.Razavi
CMOS VLSI Design: A Circuits and Systems Perspective
 Neil H.E.Weste , David Harris, 4 th edition
 And its web supplements
 https://pages.hmc.edu/harris/cmosvlsi/4e/index.html
 CMOS IC Layout
 Concepts, Methodologies, and Tools by Dan Clein
  


  開展的守備範圍
         
Areas To Be Covered

Design rule checking (DRC) and layout Design rule checking (DRC) and layout versus schematic (LVS)
 • Layout Boolean geometry (polygons, custom shapes); how to develop rules
 • Double patterning, how to fix, cut poly, cut metal, density, …
Custom design
 • Design entry, PDK, device layout, custom layout, device matching, custom routing, …
 • Interactive design editing, asynchronous GUI programming, event driven, …
Verification
 • Parasitic extraction, IR/EM, P2P resistance, least resistive path
3DIC
 • Chiplets -> design planning, wiring, dummy shapes, (electrical performance,
  


Grading

Project oriented (80%) + participation (20%); then curve

 


Keyword

關鍵字

  • 客製化設計電子設計自動化工具(EDA tools for custom design)
  • 設計規則檢查(DRC - Design Rule Check)
  • 佈局與電路圖一致性檢查(LVS - Layout Versus Schematic)
  • 三維積體電路(3DIC - Three-Dimensional Integrated Circuit)
  • 電阻電容寄生參數萃取(RC extraction)
  • SPICE 電路模擬器(SPICE simulator)
  • 光學鄰近效應修正(OPC - Optical Proximity Correction)