Title
Video
Syllabus
L1A
Introduction
L1B
Digital Systems and Switching Circuits
L1C
Conversion between Number Systems - Radix Ri to Decimal and Vice Versa
L1D
Conversion between Number Systems - Radix Ri to Radix Rj
L1E
Binary Arithmetic
L1F
Negative Numbers
L1G
Addition in 2’s Complement
L1H
Addition in 1’s Complement
L1I
Binary Codes
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資工系王俊堯教授數位邏輯設計Unit 1_Introduction Number Systems
資工系王俊堯教授數位邏輯設計Unit 2_Boolean Algebra.pdf
資工系王俊堯教授數位邏輯設計Unit 3_Boolean Algebra (Continued).p
資工系王俊堯教授數位邏輯設計Unit 4_Application of Boolean Algebr
資工系王俊堯教授數位邏輯設計Unit 5_Karnaugh Maps.pdf
資工系王俊堯教授數位邏輯設計Unit 6_Quine-McClusky Method.pdf
資工系王俊堯教授數位邏輯設計Unit 7_Multi-Level Gate Circuits NA
資工系王俊堯教授數位邏輯設計Unit 8_Combinational Circuit Design
資工系王俊堯教授數位邏輯設計Unit 9_Multiplexers, Decoders, and P
資工系王俊堯教授數位邏輯設計Unit11_Flip-Flops.pdf
資工系王俊堯教授數位邏輯設計Unit12_Relationship of the units.pdf
資工系王俊堯教授數位邏輯設計Unit13_Analysis of Clocked Sequentia
資工系王俊堯教授數位邏輯設計Unit14_Relationship of the Units.pdf
資工系王俊堯教授數位邏輯設計Unit15_Reduction of State Tables St
(A)Logic Design (Verilog).pdf
03-5715131#35401 (請於上班時間來電，中午12-13為午休時間)
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