L26_A
Virtual Address and Cache
Virtually Addressed Cache
An Alternative:Virtually Indexed but Physically Tagged (Overlapped Access)
Problem with Overlapped Access
Memory Protection
The Memory Hierarchy
Block Placement
Finding a Block
Replacement
Write Policy
Sources of Misses
Challenge in Memory Hierarchy
Cache Control
L26_B
Cache Control
Interface Signals
Cache Controller FSM
Cache Coherence Problem
Coherence Defined
Cache Coherence Protocols
Invalidating Snooping Protocols
Multilevel On-Chip Caches
2-Level TLB Organization
3-Level Cache Organization
Pitfalls
Concluding Remarks
Memory.ppt
