L23_A
Block Size Considerations
Block Size on Performance
Cache Misses
Write-Through
Avoid Waiting for Memory in Write Through
Write-Back
Write Allocation
Example: Intrinsity FastMATH
Memory Design to Support Cache
L23_B
Example: Intrinsity FastMATH
Memory Design to Support Cache
Interleaving for Bandwidth
Miss Penalty for Different Memory Organizations
Access of DRAM
DDR SDRAM
DRAM Generations
Measuring Cache Performance
Cache Performance Example
Average Access Time
Performance Summary
Improving Cache Performance
Direct Mapped
Associative Caches
Memory.ppt
